論文の実装:MCP4EDA:LLM駆動モデルコンテキストプロトコル RTLからGDSIIへの自動化とバックエンド認識の合成最適化

Claude DesktopやCursor IDEなどのAIアシスタント向けに電子設計自動化(EDA)ツールの統合を提供する包括的なModel Context Protocol(MCP)サーバーです。このサーバーにより、AIは統一インターフェースを通じてVerilog合成、シミュレーション、ASIC設計フロー、波形解析を実行できます。

• 当ウェブサイト

デモ

https://github.com/user-attachments/assets/65d8027e-7366-49b5-8f11-0430c1d1d3d6

EDA MCPサーバーのデモでVerilogの合成、シミュレーション、ASIC設計フローを示す

特徴

• Verilog Synthesis:Yosys を用いた様々なFPGAターゲット(ジェネリック、ice40、xilinx)向けにVerilogコードを合成します。
• Verilogシミュレーション:Icarus Verilogを用いた自動テストベンチ実行による設計シミュレーション
• 波形表示:VCDファイルの可視化と信号解析のためにGTKWaveを起動
• ASIC設計フロー:OpenLaneとDocker連携を用いた完全なRTLからGDSIIへのフロー
• レイアウト表示:KLayoutでGDSIIファイルを開いて物理的な設計検査を行う

EDA Tools MCP Server

Implementation of the paper: MCP4EDA: LLM-Powered Model Context Protocol RTL-to-GDSII Automation with Backend Aware Synthesis Optimization

A comprehensive Model Context Protocol (MCP) server that provides Electronic Design Automation (EDA) tools integration for AI assistants like Claude Desktop and Cursor IDE. This server enables AI to perform Verilog synthesis, simulation, ASIC design flows, and waveform analysis through a unified interface.

• Our Website

Demo

https://github.com/user-attachments/assets/65d8027e-7366-49b5-8f11-0430c1d1d3d6

EDA MCP Server demonstration showing Verilog synthesis, simulation, and ASIC design flow

Features

• Verilog Synthesis: Synthesize Verilog code using Yosys for various FPGA targets (generic, ice40, xilinx)
• Verilog Simulation: Simulate designs using Icarus Verilog with automated testbench execution
• Waveform Viewing: Launch GTKWave for VCD file visualization and signal analysis
• ASIC Design Flow: Complete RTL-to-GDSII flow using OpenLane with Docker integration
• Layout Viewing: Open GDSII files in KLayout for physical design inspection
• Report Analysis: Read and analyze OpenLane reports for PPA metrics and design quality assessment

Prerequisites

Before using this MCP server, you need to install the following EDA tools:

1. Yosys (Verilog Synthesis)

macOS (Homebrew):

brew install yosys

Ubuntu/Debian:

sudo apt-get update
sudo apt-get install yosys

From Source:

# Install prerequisites
sudo apt-get install build-essential clang bison flex \
    libreadline-dev gawk tcl-dev libffi-dev git \
    graphviz xdot pkg-config python3 libboost-system-dev \
    libboost-python-dev libboost-filesystem-dev zlib1g-dev

# Clone and build
git clone https://github.com/YosysHQ/yosys.git
cd yosys
make -j$(nproc)
sudo make install

Alternative - OSS CAD Suite (Recommended): Download the complete toolchain from: https://github.com/YosysHQ/oss-cad-suite-build/releases

2. Icarus Verilog (Simulation)

macOS (Homebrew):

brew install icarus-verilog

Ubuntu/Debian:

sudo apt-get install iverilog

Windows: Download installer from: https://bleyer.org/icarus/

3. GTKWave (Waveform Viewer)

Direct Downloads (Recommended):

• Windows: Download from SourceForge
• macOS: Download from SourceForge or use Homebrew: brew install --cask gtkwave
• Linux: Download from SourceForge or use package manager: sudo apt-get install gtkwave

Alternative Installation Methods:

# macOS (Homebrew)
brew install --cask gtkwave

# Ubuntu/Debian
sudo apt-get install gtkwave

# Build from source (all platforms)
git clone https://github.com/gtkwave/gtkwave.git