Cursor Руководство установки
AI-редактор кода, часто используемый с developer MCP.
MCP Servers
This repo provides a reference implementation for creating a remote MCP server that supports the Streamable HTTP & SSE Transports, authorized with OAuth based on the MCP specification.
Local-first persistent memory for Claude Code & Codex CLI - Rust CLI, hooks, MCP server, SQLite/SQLCipher, auditable recall for long-running coding work.
This MCP server connects your AI agent to — Google's creative suite for image and video generation. Your agent can:
MCP server for FreeCAD — 32 tools for AI-assisted 3D CAD modeling
furi is an easy to use, CLI & API for MCP management.
Agent Skills
Install only the plugins you need to run git workflows, code review, spec-driven development, and autonomous agents from inside your Claude Code session.
第一次使用时建立账号配置，沉淀片头、声音、BGM、视觉风格和确认规则；后续只需提供目标账号与一本书，即可按统一目录推进资料研究、口播稿、分镜、图片、配音、字幕、预览和成片导出。
Ask anything. Get current answers. Generate slides and mindmaps from a prompt.
A self-improving prompt optimization skill for Cursor and Claude Code, derived from Andrej Karpathy's autoresearch pattern.
你们在一起三年，分手只用了三十分钟？ 你翻着聊天记录，却越来越想不起他说话时的样子？ 你想再问他一句「你当时到底是什么意思」，却再也没有机会？ 你知道那段感情里有什么没说完，但你不知道从哪里开口？ 你只是想，再和他说说话。
Watch the skill in action — generating a complete 64×64 character spritesheet from a single prompt:
A review-gated Skill for turning dense Markdown, proposal copy, and strategy drafts into editable PowerPoint decks.
A Meta-Skill for Private-First Distribution of Agentics (Skills, Agents, and Prompts) across your Agents, Devices, and Teams.
Adds model, skill, and thinking frontmatter to pi prompt templates. Define slash commands that switch to the right model, set a thinking level, inject skill context, and auto-restore your session...
A that runs a free, open-source Google Maps scraper and lets drive it on autopilot — give Claude a city + a business type, get back a clean list of businesses (name, address, phone, website, rating,...
Or visit Releases for all available downloads.
LiveHD is a "compiler" infrastructure for hardware design optimized for synthesis and simulation. The goals is to enable a more productive flow where the ASIC/FPGA designer can work with multiple...